Display devices and methods of manufacturing display devices

ABSTRACT

A display device includes a substrate including a display region and a peripheral region, display structures at the display region of the substrate, a plurality of blocking structures at the peripheral region of the substrate wherein the blocking structures have heights different from each other, an organic layer on the display structures and the blocking structures, and an inorganic layer on the organic layer.

CROSS REFERENCE TO RELATED APPLICATION

This application is a divisional of U.S. patent application Ser. No.14/498,984, filed Sep. 26, 2014, which claims priority to and thebenefit of Korean Patent Application No. 10-2013-0116436, filed Sep. 30,2013, the entire contents of both of which are incorporated herein byreference.

BACKGROUND

Field

Aspects of example embodiments of the invention are directed towarddisplay devices and methods of manufacturing display devices.

Description of the Related Art

An organic light emitting display device employed in a flexible displaydevice is usually susceptible to moisture and oxygen, so a sealing layermay be provided by alternately stacking organic films and inorganicfilms. However, in a comparative display device including an organiclight emitting display device, the organic films formed utilizingmonomers may leak into a peripheral region of pixels. In this case,moisture or oxygen may easily permeate or penetrate into the organiclight emitting display device, such that the organic light emittingdisplay may be undesirably deteriorated and also a lifespan andreliability of the display device may be reduced. Additionally, damage,such as cracks, may occur in the inorganic films. Such damage maypropagate into internal elements of the display device through theorganic films and other inorganic films, and thus the lifespan andreliability of the display device may be further reduced. Furthermore,underlying structures of the display device may be damaged because theunderlying structures may be in contact with a mask for forming lightemitting layers of the display device.

SUMMARY

Aspects of example embodiments of the invention are directed towarddisplay devices including a plurality of blocking structures and methodsof manufacturing display devices having a plurality of blockingstructures.

Aspects of example embodiments are directed toward display devicesincluding a plurality of blocking structures having different heights.

Aspects of example embodiments are directed toward methods ofmanufacturing display devices including a plurality of blockingstructures having different heights.

According to one example embodiment, a display device includes asubstrate including a display region and a peripheral region, aplurality of display structures at the display region of the substrate,a plurality of blocking structures at the peripheral region of thesubstrate, an organic layer on the display structures and the blockingstructures, and an inorganic layer on the organic layer. The blockingstructures having heights different from each other.

The plurality of blocking structures may include a plurality of blockingpatterns. For example, each of the blocking structures may include ametal layer pattern and an insulation layer pattern.

The display device may additionally include wirings at the displayregion and the peripheral region of the substrate, an insulation layercovering the wirings, and a protection member on the insulation layerand on a portion of an outermost wiring of the wirings exposed by theinsulation layer. Here, each of the display structures may include afirst electrode on the insulation layer, a pixel defining layer on theinsulation layer and partially exposing the first electrode, a spacer onthe pixel defining layer, a light emitting layer on the exposed firstelectrode, and a second electrode on the pixel defining layer, thespacer, and the light emitting layer. The plurality of blockingstructures may include a first blocking structure, a second blockingstructure, and a third blocking structure. The first blocking structuremay have a first height, and the second blocking structure may have asecond height greater than the first height. Additionally, the thirdblocking structure may have a third height greater than the secondheight. The first blocking structure may include a first metal layerpattern and a first insulation layer pattern. The second blockingstructure may include a second metal layer pattern, a second insulationlayer pattern, and a third insulation layer pattern. The third blockingstructure may include a third metal layer pattern, a fourth insulationlayer pattern, a fifth insulation layer pattern, and a sixth insulationlayer pattern. The first metal layer pattern may be a portion of theprotection member, and the second metal layer pattern may be a portionof the outermost wiring. Further, the third metal layer pattern mayinclude a same materials as that of the wirings. Each of the secondinsulation layer pattern and the fourth insulation layer pattern mayinclude a same material as that of the insulation layer. Each of thefirst insulation layer pattern, the third insulation layer pattern, andthe fifth insulation layer pattern may include a same material as thatof the pixel defining layer. The sixth insulation layer pattern mayinclude a same material as that of the spacer.

The display device may additionally include a fourth blocking structureadjacent to the third blocking structure and at the peripheral region.The fourth blocking structure may have a height substantially the sameas a height of the third blocking structure. Here, the fourth blockingstructure may include a fourth metal layer pattern, a seventh insulationlayer pattern, an eighth insulation layer pattern, and a ninthinsulation layer pattern. The fourth metal layer pattern may include asame material as that of the wirings, and the seventh insulation layerpattern may include a same material as that of the insulation layer. Theeighth insulation layer pattern may include a same material as that ofthe pixel defining layer, and the ninth insulation layer pattern mayinclude a same material as that of the spacer.

The display device may additionally include an additional blockingstructure between adjacent pixels. The additional blocking structure mayhave a height substantially the same as a height of the third blockingstructure. The additional blocking structure may include an additionalmetal layer pattern and a plurality of additional insulation layerpatterns.

The plurality of blocking structures may include a first blockingstructure on the outermost wiring and a second blocking structureadjacent to the first blocking structure. The first blocking structuremay include a metal layer pattern that is a portion of the outermostwiring and two insulation layer patterns. Additionally, the secondblocking structure may include a metal layer pattern and threeinsulation layer patterns.

The plurality of blocking structures may include a first blockingstructure on the protection member and a second blocking structure onthe outermost wiring. The first blocking structure may include a metallayer pattern that is a portion of the protection member and oneinsulation layer pattern. Further, the second blocking structure mayinclude a metal layer pattern that is a portion of the outermost wiringand two insulation layer patterns.

According to another example embodiment, a method of manufacturing adisplay device includes providing a substrate including a display regionand a peripheral region, forming a plurality of display structures atthe display region of the substrate, forming a plurality of blockingstructures having heights different from each other at the peripheralregion of the substrate, and alternately forming an organic layer and aninorganic layer on the display structures and the blocking structures.

The method may further include forming transistors, an insulatinginterlayer, and wirings on the substrate, forming an insulation layer onthe insulating interlayer to cover the transistors and the wirings, andforming a protection member at the peripheral region of the substrate tocover the insulation layer and an outermost wiring of the wirings.

The forming of the plurality of blocking structures may include forminga metal layer pattern adjacent to the outermost wiring, forming a firstinsulation layer pattern on a portion of the outermost wiring, andforming a second insulation layer pattern on the metal layer pattern.

The outermost wiring and the metal layer pattern may be concurrentlyformed. Further, the first and the second insulation layer patterns andthe insulation layer may be concurrently formed.

The forming of the plurality of display structures may include formingfirst electrodes on the insulation layer, forming a pixel defining layerand a spacer on the insulation layer, the pixel defining layer partiallyexposing the first electrodes, forming light emitting layers on each ofthe exposed first electrodes, and forming a second electrode on thelight emitting layers, the pixel defining layer, and the spacer.

The forming of the plurality of blocking structures may further includeforming a third insulation layer pattern on the protection member,forming a fourth insulation layer pattern on the first insulation layerpattern, forming a fifth insulation layer pattern on the secondinsulation layer pattern, and forming a sixth insulation layer patternon the fifth insulation layer pattern. The third insulation layerpattern, the fourth insulation layer pattern, and the fifth insulationlayer pattern may be concurrently formed with the pixel defining layer.Further, the sixth insulation layer pattern and the spacer may beconcurrently formed.

According to aspects of example embodiments, the display device mayinclude a plurality of blocking structures having heights different fromeach other so that the leakage or overflow of organic layers, which areformed by treating monomers, from the display region into the peripheralregion may be effectively prevented. Further, failures or damage, suchas cracks, generated in the inorganic layers may be prevented frompropagating toward the display region. Therefore, the display device mayexhibit enhanced durability, reliability, structural stability, etc.Furthermore, the blocking structures may efficiently protect theunderlying structures in the display region during the formation of thelight emitting layers, such that the display device may have improveddurability, reliability, structural stability, etc.

BRIEF DESCRIPTION OF THE DRAWINGS

Example embodiments may be understood in more detail from the followingdescription taken in conjunction with the accompanying drawings, inwhich:

FIG. 1 is a cross-sectional view illustrating a display device inaccordance with an example embodiment.

FIG. 2 is a cross-sectional view illustrating a display device inaccordance with another example embodiment.

FIG. 3 is a cross-sectional view illustrating a display device inaccordance with yet another example embodiment.

FIG. 4 is a cross-sectional view illustrating a display device inaccordance with still another example embodiment.

FIGS. 5 to 7 are cross-sectional views illustrating a method ofmanufacturing a display device in accordance with an example embodiment.

FIG. 8 is a cross-sectional view illustrating a plurality of displaydevice in accordance with still another example embodiment.

DETAILED DESCRIPTION

The example embodiments are described more fully hereinafter withreference to the accompanying drawings. The invention may, however, beembodied in many different forms and should not be construed as limitedto the example embodiments set forth herein. In the drawings, the sizesand relative sizes of layers and regions may be exaggerated for clarity.

It will be understood that when an element or layer is referred to asbeing “on,” “connected to”, or “coupled to” another element or layer, itcan be directly on, connected, or coupled to the other element or layer,or intervening elements or layers may be present. When an element isreferred to as being “directly on,” “directly connected to”, or“directly coupled to” another element or layer, there are no interveningelements or layers present. Like or similar reference numerals refer tolike or similar elements throughout. As used herein, the term “and/or”includes any and all combinations of one or more of the associatedlisted items. Expressions such as “at least one of,” when preceding alist of elements, modify the entire list of elements and do not modifythe individual elements of the list.

It will be understood that, although the terms first, second, third,etc. may be used herein to describe various elements, components,regions, layers, patterns, and/or sections, these elements, components,regions, layers, patterns and/or sections should not be limited by theseterms. These terms are only used to distinguish one element, component,region, layer, pattern, or section from another element, component,region, layer, pattern, or section. Thus, a first element, component,region, layer, or section discussed below could be termed a secondelement, component, region, layer, or section without departing from theteachings of example embodiments.

Spatially relative terms, such as “beneath,” “below,” “lower,” “above,”“upper,” and the like, may be used herein for ease of description todescribe one element or feature's relationship to another element(s) orfeature(s) as illustrated in the figures. It will be understood that thespatially relative terms are intended to encompass differentorientations of the device in use or operation in addition to theorientation depicted in the figures. For example, when the device in thefigures is turned over, elements described as “below” or “under” otherelements or features would then be oriented “above” or “over” the otherelements or features. Thus, the example term “below” may encompass bothan orientation of over and below. The device may be otherwise oriented(rotated 90 degrees or at other orientations) and the spatially relativedescriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particularexample embodiments only and is not intended to be limiting of theinvention. As used herein, the singular forms “a,” “an,” and “the” areintended to include the plural forms as well, unless the context clearlyindicates otherwise. It will be further understood that the terms“comprises” and/or “comprising,” when used in this specification,specify the presence of stated features, integers, steps, operations,elements, and/or components, but do not preclude the presence oraddition of one or more other features, integers, steps, operations,elements, components, and/or groups thereof. Further, the use of “may”when describing embodiments of the present invention refers to “one ormore embodiments of the present invention.”

Example embodiments are described herein with reference to crosssectional illustrations that are schematic illustrations ofillustratively idealized example embodiments (and intermediatestructures) of the invention. As such, variations from the shapes of theillustrations as a result of, for example, manufacturing techniquesand/or tolerances, are to be expected. Thus, the example embodimentsshould not be construed as limited to the particular shapes of regionsillustrated herein but are to include deviations in shapes that resultfrom, for example, manufacturing. The regions illustrated in the figuresare schematic in nature and their shapes are not intended to illustratethe actual shape of a region of a device and are not intended to limitthe scope of the invention.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which this invention belongs. It will befurther understood that terms, such as those defined in commonly useddictionaries, should be interpreted as having a meaning that isconsistent with their meaning in the context of the relevant art andwill not be interpreted in an idealized or overly formal sense unlessexpressly so defined herein.

FIG. 1 is a cross-sectional view illustrating a display device inaccordance with an example embodiment.

Referring to FIG. 1, a display device 10 according to the exampleembodiment may include a substrate 20, a peripheral circuit, displaystructures, and a plurality of blocking structures. In exampleembodiments, the display device 10 may include a display region I (e.g.,an active region) and a peripheral region II substantially surroundingthe display region I.

In example embodiments, each of the display structures may include afirst electrode 65, a light emitting layer 85, and a second electrode90. The plurality of blocking structures may have different heights(e.g., substantially different heights). The plurality of blockingstructures may include a first blocking structure 98, a second blockingstructure 100, and a third blocking structure 115. At least one of thefirst to the third blocking structures 98, 100, and 115 may include aplurality of blocking patterns. Arrangements of the first to the thirdblocking structures 98, 100, and 115 will be described in detail. In thedisplay device 10 illustrated in FIG. 1, the first blocking structure 98may have a first height, and the second blocking structure 100 may havea second height substantially greater than the first height. Further,the third blocking structure 115 may have a third height substantiallygreater than the second height. For example, the plurality of blockingstructures of the display device 10 may have different heightsincreasing further away from the display region I of the display device10 (that is, the height of the blocking structures closer to an outsideof the peripheral region II of the display device 10 may be greater thanthe height of the blocking structures closer to the display region I ofthe display device 10).

The display structures may be disposed in the display region I of thedisplay device 10 while the peripheral circuit and the first to thethird blocking structures 98, 100 and 115 may be positioned in theperipheral region II of the display device 10. In example embodiments,the peripheral region II of the display device 10 may comprise aperipheral circuit region where the peripheral circuit is located and adead space region (e.g., a region may not contribute to display ofimages) corresponding to an outermost region of the pixel. Here, theplurality of blocking structures may be disposed in the peripheralcircuit region and the dead space region. For example, the firstblocking structure 98 and the second blocking structure 100 may bedisposed in the peripheral circuit region, and the third blockingstructure 115 may be located in the dead space region.

In the display device 10 illustrated in FIG. 1, the substrate 20 mayinclude a flexible transparent resin. For example, the substrate 20 mayinclude a poly(methyl methacrylate)-based resin (PMMA), apolyimide-based resin, an acryl-based resin, a polyacrylate-based resin,a polycarbonate-based resin, a polyether-based resin, a sulfonicacid-based resin, a polyethylene terephthalate-based resin (PET), etc.In some example embodiments, the substrate 20 may include a transparentceramic substrate, for example, a thin glass substrate.

A buffer layer 25 may be disposed on the substrate 20. The buffer layer25 may allow the display structures and the plurality of blockingstructures to be easily formed on the substrate 20. Additionally, thebuffer layer 25 may prevent diffusion of the materials from thesubstrate 20. Furthermore, the buffer layer 25 may prevent thepermeation of moisture and/or oxygen from an outside into the displaydevice 10. The buffer layer 25 may substantially improve a flatness ofthe substrate 20 (that is, the buffer layer 25 may provide asubstantially flat surface above the substrate 20).

In example embodiments, the buffer layer 25 may have an area (e.g., asurface area) substantially smaller than that of the substrate 20. Forexample, the buffer layer 25 may expose a portion of the substrate 20adjacent to an edge of the substrate 20. Thus, a step may be generatedbetween the substrate 20 and the buffer layer 25. The buffer layer 25may include a silicon compound, a transparent resin, etc. For example,the buffer layer 25 may include at least one buffer film containingsilicon oxide (e.g., SiO₂), silicon nitride (e.g., Si₃N₄), siliconoxycarbide, silicon carbon nitride, a polyacrylate-based resin, apoly(methyl acrylate)-based resin (PMA), an olefin-based resin, and/or apolyvinyl-based resin. In example embodiments, the buffer layer 25 mayinclude two buffer films containing different silicon compounds,respectively. In some example embodiments, the buffer layer 25 may havea stacked structure in which at least one buffer film composed of asilicon compound and at least one buffer film composed of a transparentresin are alternately formed on the substrate 20. However, the structureof the buffer layer 25 may vary in accordance with configuration,dimension, and/or use of the display device 10.

A gate insulation layer 30 may be disposed on the buffer layer 25. Inexample embodiments, the gate insulation layer 30 may have an area(e.g., a surface area) substantially the same as or substantiallysimilar to that of the buffer layer 25. The gate insulation layer 30 maycover the active patterns of the first and the second transistors 35 and40 on the buffer layer 25. For example, the active patterns may includea silicon compound, a semiconductor oxide, etc. In case that the activepatterns include low temperature polysilicon (LTPS), the active patternsmay be obtained by a crystallization process. The gate insulation layer30 may include a silicon compound such as silicon oxide, siliconnitride, etc. Alternatively, the gate insulation layer 30 may include ametal oxide.

Gate electrodes of the first and the second transistors 35 and 40 may bedisposed on portions of the gate insulation layer 30 covering the activepatterns. Each of the gate electrodes may include a metal, an alloy, aconductive metal oxide, a transparent conductive material, etc. Wirings,such as gate lines electrically coupled to (e.g., electrically connectedto) the gate electrodes may be disposed on the gate insulation layer 30.

An insulating interlayer 45 may be formed on the gate insulation layer30 to cover the gate electrodes of the first and the second transistors35 and 40. The insulating interlayer 45 may electrically insulate thegate electrodes of the first and the second transistors 35 and 40 fromupperlying wirings and/or electrodes. The insulating interlayer 45 mayinclude a silicon compound, a transparent resin, etc. Examples of thesilicon compound for the insulating interlayer 45 may include siliconoxide, silicon nitride, silicon oxynitride, etc.

Source electrodes and drain electrodes of the first and the secondtransistors 35 and 40 may be disposed on the insulating interlayer 45.Additionally, wirings including data lines 50 and an outermost wiring 55(e.g., power lines) may be positioned on the insulating interlayer 45.The data lines 50 may be electrically coupled to (e.g., electricallyconnected to) the source electrodes of the first and the secondtransistors 35 and 40. The outermost wiring 55 may be electricallycoupled to the second electrode 90 of the display structure. Each of thesource electrodes and the drain electrodes may include a metal, analloy, a conductive metal oxide, a transparent conductive material, etc.The source electrodes and the drain electrodes may pass through theinsulating interlayer 45 and contact the active patterns, respectively.

As illustrated in FIG. 1, an insulation layer 60 may be disposed tocover the first transistors 35 and the data lines 50 in the displayregion I. The insulation layer 60 may extend into the peripheral regionII so that the insulation layer 60 may cover the second transistor 40and partially cover an outermost wiring 55 in the peripheral region II.The insulation layer 60 may electrically insulate the first transistors35 from the first electrodes 65 of the display structures in the displayregion I.

The insulation layer 60 may include organic material. For example, theinsulation layer 60 may include a polyimide-based resin, a photoresist,an acryl-based resin, a polyamide-based resin, etc. These may be usedalone or in a combination thereof. The insulation layer 60 may have asingle layer structure or a multi layer structure. In some exampleembodiments, the insulation layer 60 may include inorganic material suchas a silicon compound, a metal oxide, etc. Examples of the siliconcompound for the insulation layer 60 may include silicon oxide, siliconnitride, silicon oxynitride, etc.

The peripheral circuit covered by the insulation layer 60 may include agate driver, a data driver, a timing controller, etc., in addition tothe second transistor 40 and the wirings including the outermost wiring55.

The first electrodes 65 may be disposed on the insulation layer 60. Thefirst electrodes 65 may be electrically coupled to (e.g., electricallyconnected to) the drain electrodes of the first transistors 35 throughcontacts 75 formed in the insulation layer 60, respectively. In thedisplay region I, adjacent first electrodes 65 may be spaced apart by adistance (e.g., a predetermined distance). Each of the first electrodes65 may include a metal, an alloy, a metal nitride, a conductive metaloxide, a transparent conductive material, etc. These may be used aloneor in a combination thereof.

In the display region I of the display device 10 illustrated in FIG. 1,a pixel defining layer 80 may be disposed on the insulation layer 60.The pixel defining layer 80 may have openings exposing the firstelectrodes 65, respectively. The openings of the pixel defining layer 80may define respective light emitting regions of the display device 10.The pixel defining layer 80 may extend onto a portion of the insulationlayer 60 which covers the wirings 50 in the display region I. The pixeldefining layer 80 may include organic material. For example, the pixeldefining layer 80 may include a polyimide-based resin, a photoresist, apolyacryl-based resin, a polyamide-based resin, an acryl-based resin,etc. A spacer 83 may be disposed on the pixel defining layer 80 so as toensure a cell gap of the pixel. In example embodiments, the spacer 83may include material substantially the same as or substantially similarto that of the pixel defining layer 80. In this case, the spacer 83 andthe pixel defining layer 80 may be formed by (e.g., obtained by) anetching process utilizing a halftone mask, a halftone slit mask, etc.Here, the spacer 83 may be intergrally formed with the pixel defininglayer 80. In some example embodiments, the spacer 83 may be separatelyformed on the pixel defining layer 80. For example, the spacer 83 may beadditionally formed on the pixel defining layer 80.

In the peripheral region II of the display device 10, a protectionmember 70 may be disposed on the upper portion and a lateral portion(e.g., a side) of the insulation layer 60. The protection member 70 mayprotect the peripheral circuit from static electricity, external impact,etc. Further, the protection member 70 may serve as a wiring forelectrically coupling the outermost wiring 55 to the second electrode90. In example embodiments, the protection member 70 may extend onto theoutermost wiring 55 from a side of the pixel defining layer 80 in theperipheral region II. For example, the protection member 70 may contactthe side of the pixel defining layer 80 and may extend onto theoutermost wiring 55 while substantially enclosing the side of the pixeldefining layer 80.

The protection member 70 may include material substantially the same asor substantially similar to those of the first electrodes 65. Forexample, the protection member 70 may include a metal, an alloy, a metalnitride, a conductive metal oxide, a transparent conductive material,etc. The protection member 70 may have a single layer structure or amulti layer structure containing the above-described metal, alloy, metalnitride, conductive metal oxide, and/or transparent conductive material.As further described below, a portion of the protection member 70 mayserve as a first metal layer pattern of the first blocking structure 98.For example, the first blocking structure 98 may include the first metallayer pattern, which is the portion of the protection member 70, and afirst insulation layer pattern 95.

Light emitting layers 85 may be disposed respectively on the firstelectrodes 65 exposed by the openings in the pixel defining layer 80.Each of the light emitting layers 85 may have a multi layer structurethat includes an organic light emitting layer (EML), a hole injectionlayer (HIL), a hole transfer layer (HTL), an electron transfer layer(ETL), an electron injection layer (EIL), etc. The organic lightemitting layers of the light emitting layers 85 may include lightemitting materials emitting different colors of light, such as red,blue, and green, according to the respective kind of pixel. In someexample embodiments, the organic light emitting layer of each lightemitting layer 85 may include a plurality of stacked light emittingmaterials for emitting red light, blue light, and green light so as togenerate substantially white color light.

The second electrode 90 may be disposed on the light emitting layers 85,the pixel defining layer 80, and the spacer 83. The second electrode 90may extend onto the protection member 70 in the peripheral region II.For example, the second electrode 90 may overlap the protection member70 in the peripheral region II. The second electrode 90 may serve as acommon electrode shared by adjacent pixels of the display device 10. Thesecond electrode 90 may include a metal, an alloy, a metal nitride, aconductive metal oxide, a transparent conductive material, etc.

As illustrated in FIG. 1, the first to the third blocking structures 98,100, and 115 including the plurality of blocking patterns may bepositioned in the peripheral region II of the display device 10.

In example embodiments, the first blocking structure 98 having the firstheight may be disposed on the outermost wiring 55. The first blockingstructure 98 may include the first metal layer pattern and the firstinsulation layer pattern 95. Because the first blocking structure 98 mayhave the first metal layer pattern and the first insulation layerpattern 95, the first blocking structure 98 may prevent a first organiclayer 140 and/or a second organic layer 150 of the display device 10from leaking to an outside of the peripheral region II (e.g., the firstblocking structure 98 may prevent the first organic layer 140 and/or asecond organic layer 150 from contacting the outermost wiring 55). Inexample embodiments, the first metal layer pattern may be a portion ofthe protection member 70, and the first insulation layer pattern 95 maybe positioned on the first metal layer pattern. The first insulationlayer pattern 95 may be easily formed when the first insulation layerpattern 95 is formed on the first metal layer pattern. In the displaydevice 10 illustrated in FIG. 1, the first organic layer 140 may bespaced from (e.g., spaced apart from) the first blocking structure 98,however, the first organic layer 140 may contact the first blockingstructure 98 so as to prevent the leakage of the first organic layer 140toward the outside of the peripheral region II of the display device 10.Hence, the first blocking structure 98 may effectively prevent theleakage of the first organic layer 140 even though the first organiclayer 140 has a relatively large thickness.

The first blocking structure 98 may have the first height that may besubstantially greater than that of the insulation layer 60 in thedisplay region I by the sum of thicknesses of the outermost wiring 55and the protection member 70. In some example embodiments, the firstmetal layer pattern of the first blocking structure 98 may be a portionof the outermost wiring 55 when the display device 10 does not includethe protection member 70. In this case, the first height of the firstblocking structure 98 may be substantially greater than that of theinsulation layer 60 by the thickness of the outermost wiring 55. Thefirst insulation layer pattern 95 may include material substantially thesame as or substantially similar to that of a pixel defining layer 80 inthe display region I. For example, the first insulation layer pattern 95may include a polyimide-based resin, a photoresist, an acryl-basedresin, a polyamide-based resin, a siloxane-based resin, etc. These maybe used alone or in a combination thereof.

The second blocking structure 100 may be adjacent to the first blockingstructure 98. The second blocking structure 100 may include a secondmetal layer pattern 58, a second insulation layer pattern 105, and athird insulation layer pattern 110. The second blocking structure 100may further prevent the first organic layer 140 and/or the secondorganic layer 150 from leaking into the peripheral region II. Forexample, when the second organic layer 150 flows over the first blockingstructure 98, the second blocking structure 100 may prevent the leakageof the second organic layer 150 toward the peripheral region II (e.g.,the second blocking structure 100 may prevent further leakage of thesecond organic layer 150 into the peripheral region II). The secondheight of the second blocking structure 100 may be substantially greaterthan the first height of the first blocking structure 98 by a thicknessof the third insulation layer pattern 110.

In example embodiments, the second metal layer pattern 58 of the secondblocking structure 100 may be an end portion of the outermost wiring 55.The second insulation layer pattern 105 may be disposed (e.g,. partiallydisposed) on the insulating interlayer 45 to cover the second metallayer pattern 58. For example, one end portion of the outermost wiring55 may be covered by the second insulation layer pattern 105, and a topportion (e.g,. a central portion) of the outermost wiring 55 may becovered by the first insulation layer pattern 95. Additionally, anotherend portion of the outermost wiring 55 may be covered by the insulationlayer 60. Here, the protection member 70 may extend onto a side of thesecond insulation layer pattern 105 and onto a portion of an upper face(e.g., a portion of a top) of the second insulation layer pattern 105.Thus, one end portion of the protection member 70 may be interposedbetween the second insulation layer pattern 105 and the third insulationlayer pattern 110. The second insulation layer pattern 105 may be easilyformed when the second insulation layer pattern 105 is disposed on thesecond metal layer pattern 58. The second insulation layer pattern 105may include a material substantially the same as or substantiallysimilar to that of the insulation layer 60 in the display region I. Inexample embodiments, the second insulation layer pattern 105 and theinsulation layer 60 may be formed in (e.g., obtained by) one process(e.g., a single process). For example, the second insulation layerpattern 105 may include a polyimide-based resin, a photoresist, anacryl-based resin, a polyamide-based resin, etc. These may be used aloneor in a combination thereof. In some example embodiments, the secondinsulation layer pattern 105 may include inorganic material, forexample, a silicon compound, a metal oxide, etc. The third insulationlayer pattern 110 may include material substantially the same as orsubstantially similar to that of the pixel defining layer 80 in thedisplay region I. For example, the third insulation layer pattern 110may include a polyimide-based resin, a photoresist, an acryl-basedresin, a polyamide-based resin, etc. These may be used alone or in acombination thereof. In this case, the third insulation layer pattern110 and the pixel defining layer 80 may be formed in (e.g., obtained by)the same process (e.g., a single process).

In the display device 10 illustrated in FIG. 1, the third blockingstructure 115 may be arranged adjacent to the second blocking structure100. In example embodiments, the first and the second blockingstructures 98 and 100 may be arranged in the peripheral circuit regionof the peripheral region II, and the third blocking structure 115 may bedisposed in the dead space region of the peripheral region II. The thirdblocking structure 115 may prevent damage to other structures (e.g.,underlying structures) including the second blocking structure 100 andthe pixel defining layer 80 during a process of positioning a mask onthe pixel defining layer 80 and/or the spacer 83 in order to form thelight emitting layers 85 in the display region I. Further, the thirdblocking structure 115 may prevent failures such as cracks generated ina first inorganic layer 145 and/or a second inorganic layer 155 frompropagating into structures in the display region I from the peripheralregion II. Furthermore, the third blocking structure 115 may prevent theleakage of the second organic layer 150 toward the peripheral region II(e.g., may prevent the leakage of the second organic layer 150 furtherinto the peripheral region II). In some example embodiments, when thedisplay device 10 includes additional organic and inorganic layers, thethird blocking structure 115 may prevent the additional organic layersfrom flowing into (e.g., flowing further into) the peripheral region II.

In example embodiments, the third blocking structure 115 may include athird metal layer pattern 120, a fourth insulation layer pattern 125, afifth insulation layer pattern 130, and a sixth insulation layer pattern135. The third height of the third blocking structure 115 may besubstantially greater than the second height of the second blockingstructure 100. For example, the third height of the third blockingstructure 115 may be greater than the second height of the secondblocking structure 100 by a thickness of the sixth insulation layerpattern 135. Accordingly, the display device 10 may include the first tothe third blocking structures 98, 100, and 115 having heights increasedtoward an outside of the pixel (e.g., the respective heights of thefirst to the third blocking structures 98, 100, and 115 may increaseaccording to a distance from an outside of the display device 10).

The third metal layer pattern 120 may include material substantially thesame as or substantially similar to that of the wirings 50 and 55. Thefourth insulation layer pattern 125 may be easily formed when the fourthinsulation layer pattern 125 is disposed on the third metal layerpattern 120. In example embodiments, the third metal layer pattern 120may include a metal, an alloy, a metal nitride, a conductive metaloxide, a transparent conductive material, etc. For example, the thirdmetal layer pattern 120 may include aluminum, an alloy containingaluminum, aluminum nitride, silver, an alloy containing silver,tungsten, tungsten nitride, copper, an alloy containing copper, nickel,chrome, chrome nitride, molybdenum, an alloy containing molybdenum,titanium, titanium nitride, platinum, tantalum, tantalum nitride,neodymium, scandium, strontium ruthenium oxide, zinc oxide, indium tinoxide, tin oxide, indium oxide, gallium oxide, indium zinc oxide, etc.These may be used alone or in a combination thereof. The third metallayer pattern 120 and the wirings 50 and 55 may be formed in (e.g.,obtained by) the same process (e.g,. a single process). For example, thefirst metal layer pattern (i.e., the portion of the protection member70), the second metal layer pattern 58, and the third metal layerpattern 120 may be concurrently or simultaneously formed.

The fourth insulation layer pattern 125 of the third blocking structure115 may include material substantially the same as or substantiallysimilar to that of the insulation layer 60 in the display region I. Forexample, the fourth insulation layer pattern 125 may include materialsubstantially the same as those of the first insulation layer pattern 95and the second insulation layer pattern 105. In example embodiments, theinsulation layer 60 and the first insulation layer pattern 95 may beformed in (i.e, may be obtained by) the same process (i.e, a singleprocess). In some example embodiments, the first insulation layerpattern 95, the second insulation layer pattern 105 and the fourthinsulation layer pattern 125 may be formed in the same process. Infurther example embodiments, the insulation layer 60, the firstinsulation layer pattern 95, the second insulation layer pattern 105 andthe fourth insulation layer pattern 125 may be formed in the sameprocess. The fifth insulation layer pattern 130 may include materialsubstantially the same as or substantially similar to that of the pixeldefining layer 80 in the display region I. For example, the fifthinsulation layer pattern 130 and the pixel defining layer 80 may beconcurrently or simultaneously formed (e.g,. obtained). The sixthinsulation layer pattern 135 may include material substantially the sameas or substantially similar to that of the spacer 83 in the displayregion I. In example embodiments, the fifth insulation layer pattern 130and the sixth insulation layer pattern 135 may be formed in (e.g.,obtained in) the process for forming the pixel defining layer 80 and thespacer 83 in the display region I.

As described above, the display device 10 according to exampleembodiments may include at least one blocking structure that may have atleast one metal layer patterns and at least one insulation layerpattern. The first to the third blocking structures 98, 100, and 115 mayhave various kinds of blocking patterns and the numbers of the blockingpatterns in the first to the third blocking structures 98, 100, and 115may be different or may vary, such that the first to the third blockingstructures 98, 100, and 115 may have different or various heights,respectively.

Referring now to FIG. 1, the first organic layer 140 may be formed inthe display region I and in the peripheral region II to cover thedisplay structures. Although it is not illustrated in FIG. 1, the firstorganic layer 140 may flow over the first blocking structure 98 and maycontact the second blocking structure 100 in the peripheral region II.Furthermore, the first organic layer 140 may flow over the first and thesecond blocking structures 98 and 100, and may make contact with thethird blocking structure 115 in the peripheral region II. That is, thefirst organic layer 140 may be formed on the first blocking structure 98and/or the second blocking structure 100, and may be contacted with thethird blocking structure 115. The first organic layer 140 may improvethe flatness of the display device 10 and also may protect the displaystructures in the display region I. Further, the first organic layer 140may prevent the diffusion of impurities from or to the underlyingstructures. For example, the first organic layer 140 may include apolyimide-based resin, a polyacryl-based resin, a polyamide-based resin,etc.

A first inorganic layer 145 may be disposed on the first organic layer140. The first inorganic layer 145 may prevent the first organic layer140 and the display structures from being deteriorated by the permeationof moisture, oxygen, etc. Additionally, the first inorganic layer 145may protect the first organic layer 140 and the display structures fromexternal impacts. The first inorganic layer 145 may include a metalcompound. For example, the first inorganic layer 145 may include siliconnitride, aluminum nitride, zirconium nitride, titanium nitride, hafniumnitride, tantalum nitride, silicon oxide, aluminum oxide, titaniumoxide, tin oxide, cerium oxide, silicon oxynitride, etc.

The second organic layer 150 may be positioned on the first inorganiclayer 145. The second organic layer 150 may perform functionssubstantially the same as or substantially similar to those of the firstorganic layer 140, and the second organic layer 150 may include materialsubstantially the same as or substantially similar to that of the firstorganic layer 140.

A second inorganic layer 155 may be disposed on the second organic layer150. The second inorganic layer 155 may perform functions substantiallythe same as or substantially similar to those of the first inorganiclayer 145, and the second inorganic layer 155 may include materialsubstantially the same as or substantially similar to that of the firstinorganic layer 145.

According to example embodiments, the display device 10 may include thefirst to the third blocking structures 98, 100, and 115 having theabove-described configurations, so the leakage or overflow of the firstand the second organic layers 140 and 150 formed by the processing ofmonomers may be effectively prevented. For example, the first and thesecond organic layers 140 and 150 may flow over the first blockingstructure 98 and may contact the second blocking structure 100 in theperipheral region II. Furthe, the first organic layer 140 may flow overthe first and the second blocking structures 98 and 100, and may makecontact with the third blocking structure 115 in the peripheral regionII. In other words, the first and the second organic layers 140 and 150may not flow toward the outside of the peripheral region II because ofthe first blocking structure 98, the second blocking structure 100and/or the third blocking structure115 (e.g,. the first and the secondorganic layers 140 and 150 may not flow further into the peripheralregion II past the first blocking structure 98, the second blockingstructure 100 and/or the third blocking structure 115). Further, thedurability and the reliability of t the display device 10 may not bedegraded because the first to the third blocking structures 98, 100, and115 may block the propagation of failures such as cracks that may begenerated in the first inorganic layer 145 and/or the second inorganiclayer 155. Furthermore, the first to the third blocking structures 98,100 and 115 may effectively protect the underlying structures, such asthe display structures, during the masking process for forming the lightemitting layers 85 in the display region I, so that the display device10 may have improved reliability, durability, etc.

In some example embodiments, the display device 10 may include at leastone additional upper organic layer and at least one additional upperinorganic layer according to application, dimensions, components, etc.Alternatively, the display device 10 may include at least one additionallower organic layer and at least one additional lower inorganic layer.When a plurality of additional organic layers are disposed in thedisplay device 10, the second blocking structure 100 and/or the thirdblocking structure 115 may effectively prevent the leakage or overflowof the additional organic layers from the display region I to theperipheral region II. In further example embodiments, the display device10 may include one organic layer and one inorganic layer.

FIG. 2 is a cross-sectional view illustrating a display device inaccordance with some other example embodiments of the invention. In FIG.2, like reference numerals are used to designate elements of the displaydevice the same as those in FIG. 1, and detailed description of theseelements may be omitted. The display device illustrated in FIG. 2 mayhave a configuration substantially the same as or substantially similarto that of the display device 10 described with reference to FIG. 1except for a fourth blocking structure 160 adjacent to the thirdblocking structure 115.

Referring to FIG. 2, the fourth blocking structure 160 may have a fourthheight substantially the same as or substantially similar to the thirdheight of the third blocking structure 115. Further, the fourth blockingstructure 160 may include blocking patterns substantially the same as orsubstantially similar to those of the third blocking structure 115. Thatis, the display device may include two blocking structures 115 and 160located adjacent to the first and the second blocking structures 98 and100 disposed in the peripheral region II (e.g., the two blockingstructures 115 and 160 may be adjacent to the peripheral circuit regionand in the dead space region). Here, the fourth blocking structure 160may have a configuration substantially the same as or substantiallysimilar to that of the third blocking structure 115.

The fourth blocking structure 160 may include a fourth metal layerpattern 165, a seventh insulation layer pattern 170, an eighthinsulation layer pattern 175, and a ninth insulation layer pattern 180.The fourth metal layer pattern 165 may include material substantiallythe same as or substantially similar to that of the third metal layerpattern 120. In addition, the seventh to the ninth insulation layerpatterns 170, 175, and 180 may include materials substantially the sameas or substantially similar to those of the fourth to the sixthinsulation layer patterns 125, 130, and 135, respectively.

Because the display device may additionally include the fourth blockingstructure 160, the leakage or overflow of the first organic layer 140,the second organic layer 150, and/or additional organic layers towardthe peripheral region II may be efficiently prevented. Further, theprogression of failures such as cracks generated in the first inorganiclayer 145, the second inorganic layer 155, and/or additional inorganiclayers may be blocked. Furthermore, the first to the fourth blockingstructures 98, 100, 115, and 160 may effectively protect the underlyingstructures, including the display structures in the display region I,during the process for forming the light emitting layers 85. As aresult, the display device may ensure enhanced durability, reliability,etc.

FIG. 3 is a cross-sectional view illustrating a display device inaccordance with some other example embodiments of the invention. In thedisplay device illustrated in FIG. 3, a first blocking structure 100′and a second blocking structure 115′ may have configurationssubstantially the same as or substantially similar to those of thesecond blocking structure 100 and the third blocking structure 115described with reference to FIG. 1. That is, the second blockingstructure 100 and the third blocking structure 115 in FIG. 1 maysubstantially correspond to or may be substantially similar to the firstblocking structure 100′ and the second blocking structure 115′ in FIG.3. The display device illustrated in FIG. 3 may have a configurationsubstantially the same as or substantially similar to that of thedisplay device 10 described with reference to FIG. 1 except for thefirst blocking structure 98 illustrated in FIG. 1. Namely, a blockingstructure may not be disposed on the protection member 70.

In some example embodiments, the first blocking structure 100′ mayinclude a first metal layer pattern 58′, a first insulation layerpattern 105′, and a second insulation layer pattern 110′. In this case,the first metal layer pattern 58′, the first insulation layer pattern105′, and the second insulation layer pattern 110′ may be substantiallythe same as or substantially similar to the second metal layer pattern58, the second insulation layer pattern 105, and the third insulationlayer pattern 110, respectively. The second blocking structure 115′ mayinclude a second metal layer pattern 120′, a third insulation layerpattern 125′, a fourth insulation layer pattern 130′, and a fifthinsulation layer pattern 135′. Here, the second metal layer pattern120′, the third insulation layer pattern 125′, the fourth insulationlayer pattern 130′, and the fifth insulation layer pattern 135′ may besubstantially the same as or substantially similar to the third metallayer pattern 120, the fourth insulation layer pattern 125, the fifthinsulation layer pattern 130, and the sixth insulation layer pattern135, respectively.

According to some example embodiments, the display device may includetwo blocking structures 100′ and 115′ having different heights, so thatthe leakage or the overflow of the first organic layer 140 and/or thesecond organic layer 150 toward the peripheral region II may beprevented when the display device does not include additional organiclayers. Additionally, the second blocking structure 115′ may preventdamage to the underlying structures while forming the light emittinglayers 85 utilizing a mask. Furthermore, the first and the secondblocking structures 100′ and 115′ may prevent the progression of cracksthat may generated in the first inorganic layer 145 and the secondinorganic layer 155 toward the underlying structures in the displayregion I. Because the display device illustrated in FIG. 3 may includethe two blocking structures 100′ and 115′, the display device may haverelatively small dimensions (e.g,. smaller dimensions than the displaydevices illustrated in FIGS. 1 and 2).

FIG. 4 is a cross-sectional view illustrating a display device inaccordance with some other example embodiments of the invention. In FIG.4, like reference numerals are used to designate elements of the displaydevice the same as those in FIG. 1, and detailed description of theseelements may be omitted. The display device illustrated in FIG. 4 mayhave a configuration substantially the same as or substantially similarto that of the display device 10 described with reference to FIG. 1except for the third blocking structure 115 illustrated in FIG. 1.

Referring to FIG. 4, the display device may include the first blockingstructure 98 and the second blocking structure 100. The first blockingstructure 98 may be disposed on the protection member 70, and the secondblocking structure 100 may be positioned on the outermost wiring 55partially exposed by the insulation layer 60.

In some example embodiments, the first and the second blockingstructures 98 and 100 may be located adjacent to the display region I,such that the display device may have relatively reduced dimensions.Unless the display device includes too many additional organic layers,the first and the second blocking structure 98 and 100 may sufficientlyprevent the leakage or overflow of the first organic layer 140 and/orthe second organic layer 150 from the display region I into theperipheral region II. Further, damage (e.g., cracks) to the firstinorganic layer 145 and/or the second inorganic layer 155 may notprogress into the underlying structures in the display region I becauseof the first and the second blocking structures 98 and 100.

FIGS. 5 to 7 are cross-sectional views illustrating a method ofmanufacturing a display device in accordance with example embodiments.In FIGS. 5 to 7, the method may provide a display device having aconfiguration substantially the same as or substantially similar to thatof the display device 10 descried with reference to FIG. 1, however,those skilled in the art could understand that any one of the displaydevices illustrated in FIGS. 2 to 4 may be obtained by obviousmodifications or changes of the processes, such as patterning or etchingprocesses.

Referring to FIG. 5, there is provided a substrate 220 having a displayregion III and a peripheral region IV. Here, the peripheral region IV ofthe substrate 220 may include a peripheral circuit region whereperipheral circuits are formed and a dead space region corresponding toan outermost portion of the substrate 220. The substrate 220 may includea flexible transparent resin containing, for example, a poly(methylmethacrylate)-based resin (PMMA), a polyimide-based resin, anacryl-based resin, a polyacrylate-based resin, a polycarbonate-basedresin, a polyether-based resin, a sulfonic acid-based resin, apolyethylene terephthalate-based resin (PET), etc. Alternatively, thesubstrate 220 may include a transparent ceramic substrate, for example,a glass substrate.

A buffer layer 225 may be formed on the substrate 220. The buffer layer225 may extend from the display region III into the peripheral regionIV. The buffer layer 225 may be formed utilizing a transparent resin, asilicon compound, etc. For example, the buffer layer 225 may be formedutilizing a polyacrylate-based resin, a polymethacrylate-based resin, anolefin-based resin, and/or polyvinyl-based resin, silicon oxide, siliconnitride and/or silicon oxynitride. Further, the buffer layer 225 may beformed by (e.g., obtained by) a spin coating process, a printingprocess, a thermal treatment process, a chemical vapor depositionprocess, etc.

In example embodiments, the buffer layer 225 may include a plurality ofbuffer films by depositing silicon compounds on the substrate 220.Alternatively, the buffer layer 225 may be formed by (e.g., obtained by)alternately forming at least one buffer film containing a siliconcompound and at least one buffer film containing a transparent resin. Insome example embodiments, the buffer layer 225 may not be formed on thesubstrate 220 based on material included in the substrate 220 or surfaceconditions of the substrate 220.

First active patterns 230 and second active patterns 235 may be formedon the buffer layer 225. The first active patterns 230 may be formed in(e.g., positioned in) the display region III, and the second activepatterns 235 may be formed in (e.g., positioned in) the peripheralregion IV. In example embodiments, a semiconductor layer may be formedon the substrate 220, and then the semiconductor layer may be patternedto form preliminary first active patterns in the display region III. Inaddition, preliminary second active patterns may be formed in theperipheral region IV. The first and the second active patterns 230 and235 may be formed by (e.g., obtained by) performing a thermal treatmentprocess, a laser irradiation process, or a thermal treatment processutilizing a catalyst on the preliminary first and second activepatterns.

For example, the semiconductor layer may be formed utilizing amorphoussilicon, amorphous silicon containing impurities (e.g., doped amorphoussilicon), etc. Further, the semiconductor layer may be formed by achemical vapor deposition process, a plasma enhanced chemical vapordeposition process, a low pressure chemical vapor deposition process, asputtering process, etc. Each of the first and the second activepatterns 230 and 235 may include polysilicon, polysilicon containingimpurities (e.g., doped polysilicon), partially crystalized silicon,silicon containing micro crystals, a semiconductor oxide, etc.

Referring to FIG. 5, a gate insulation layer 240 may be formed on thebuffer layer 225 to cover the first and the second active patterns 230and 235. The gate insulation layer 240 may be uniformly formed on thebuffer layer 225. Additionally, the gate insulation layer 240 may havean area (e.g., a surface area) substantially the same as orsubstantially similar to an area (e.g., a surface area) of the bufferlayer 225. The gate insulation layer 240 may be formed of a siliconcompound such as silicon oxide, silicon oxycarbide, silicon oxynitride,etc. Further, the gate insulation layer 240 may be formed by a chemicalvapor deposition process, a spin coating process, a plasma enhancedchemical vapor deposition process, a sputtering process, a vacuumevaporation process, a high density plasma-chemical vapor depositionprocess, a printing process, etc. In some example embodiments, the gateinsulation layer 240 may be formed by (e.g., obtained by) a chemicalvapor deposition process, a spin coating process, a plasma enhancedchemical vapor deposition process, a sputtering process, a vacuumevaporation process, or a high density plasma-chemical vapor depositionprocess, utilizing a metal oxide, for example, hafnium oxide, aluminumoxide, zirconium oxide, titanium oxide, tantalum oxide, etc.

Referring to FIG. 6, first gate electrodes 245 and second gateelectrodes 250 may be formed on the gate insulation layer 240. The firstand the second gate electrodes 245 and 250 may be formed by a metal, analloy, a conductive metal oxide, a transparent conductive material, etc.Further, the first and the second gate electrodes 245 and 250 may beformed by a sputtering process, a chemical vapor deposition process, apulsed laser deposition process, a vacuum evaporation process, an atomiclayer deposition process, etc. The first gate electrodes 245 may bepositioned on portions of the gate insulation layer 240 under which thefirst active patterns 230 (see FIG. 5) are disposed in the displayregion III. The second gate electrodes 250 may be located on portions ofthe gate insulation layer 240 where the second active patterns 235 (seeFIG. 5) are positioned in the peripheral region IV.

Gate lines may be formed on the gate insulation layer 240 in the displayregion III and the peripheral region IV. The gate lines may beelectrically coupled to (e.g., electrically connected to) the first andthe second gate electrodes 245 and 250. Further, source regions anddrain regions may be formed in the first active patterns 230 (see FIG.5) and the second active patterns 235 (see FIG. 5) by implantation ofimpurities utilizing the first and the second gate electrodes 245 and250 as masks.

An insulating interlayer 290 may be formed on the gate insulation layer240 to cover the first and the second gate electrodes 245 and 250. Theinsulating interlayer 290 may be formed utilizing a silicon compound, atransparent resin, etc. Additionally, the insulating interlayer 290 maybe obtained by a printing process, a spin coating process, a chemicalvapor deposition process, etc.

The insulating interlayer 290 may be partially etched to form contactholes that expose the source and the drain regions of the first and thesecond active patterns 230 and 235. First drain electrodes 255, firstsource electrodes 260, second drain electrodes 265, and second sourceelectrodes 270 may be formed on the insulating interlayer 290 and/or atthe contact holes. At the same time, wirings 295 and 300 may be formedon the insulating interlayer 290 in the display and peripheral regionsIII and IV. Such a wiring 295 (e.g., a data line) may be be electricallycoupled (e.g., electrically connected) to the first and the secondsource electrodes 260 and 270. Further, the wiring 300 (e.g., a powerline) may be electrically coupled (e.g., electrically connected) to asecond electeode 370 (see FIG. 7).

In example embodiments, the insulating interlayer 290, the gateinsulation layer 240 and the buffer layer 225 may be partially removedto expose a portion of the substrate 220 (e.g., portions of the gateinsulation layer 240 may be removed to expose a portion of the substrate220). For example, a portion of the substrate 220 adjacent to an edgethereof may be exposed after removing insulating interlayer 290, thegate insulation layer 240 and the buffer layer 225. Accordingly, a stepmay be generated between the substrate 220, the buffer layer 225, thegate insulation layer 240 and the insulating interlayer 290. In someexample embodiments, the insulating interlayer 290 and the gateinsulation layer 240 may be partially removed to expose a portion of thebuffer layer 225 adjacent to an edge thereof. Additionally, the bufferlayer 225 may be partially removed to expose the portion of thesubstrate 220 adjacent to the edge thereof.

In example embodiments, a conductive layer may be formed on theinsulating interlayer 290 to fill the contact holes. After theconductive layer is formed, it may be patterned to obtain the firstdrain electrodes 255, the second drain electrodes 265, the first sourceelectrodes 260, the second source electrodes 270, and the wirings 295and 300. The conductive layer may be formed utilizing a metal, an alloy,a metal nitride, a conductive metal oxide, a transparent conductivematerial, etc. These may be used alone or in a combination thereof.Further, the conductive layer may be formed by a printing process, asputtering process, a vacuum evaporation process, a chemical vapordeposition process, etc.

The first and the second drain electrodes 255 and 265 may contact thedrain regions of the first and the second active patterns 230 and 235,and the first and the second source electrodes 260 and 270 may contactthe source regions of the first and the second active patterns 230 and235. First transistors 275 including the first drain electrodes 255 andthe first source electrodes 260and second transistors 280 including thesecond drain electrodes 265 and the second source electrodes 270 may beprovided over the substrate 220. The first transistors 275 and thesecond transistors 280 may be formed in the display region III and theperipheral region IV, respectively.

As illustrated in FIG. 6, a metal layer pattern 305 may be formedadjacent to an outermost wiring 300 in the peripheral region IV whileforming the wirings 295 and 300. In example embodiments, an insulationlayer pattern of a blocking structure may not be directly formed on theinsulating interlayer 290 or the substrate 220. However, the insulationlayer pattern of the blocking structure may be easily formed on themetal layer pattern 305 and the insulating interlayer 290 when the metallayer pattern 305 is interposed between the insulating interlayer 290and the insulation layer pattern of the blocking structure. For example,the metal layer pattern 305 may improve the structural stability of theblocking structure. As discussed below, the metal layer pattern 305 maybe a third metal layer pattern of a third blocking structure 390 whenthe display device includes a first blocking structure 378, a secondblocking structure 380, and the third blocking structure 390 (see FIG.7). In this case, a portion of the outermost wiring 303 may be a secondmetal layer pattern of the second blocking structure 380, and a portionof a protection member 340 formed thereafter may be a first metal layerpattern of the first blocking structure 378.

An insulation layer 310 may be formed on the insulating interlayer 290to cover the first transistors 275 and the data line 295 in the displayregion III and to cover the second transistors 280 and peripheralcircuits in the peripheral region IV. The insulation layer 310 mayextend to cover a portion 303 of the outermost wiring 300. Theinsulation layer 310 may be formed utilizing a polyimide-based resin, aphotoresist, an acryl-based resin, a polyamide-based resin, etc.Further, the insulation layer 310 may be formed by a printing process,an ink jet process, a spin coating process, etc. Alternatively, theinsulation layer 310 may be formed utilizing a silicon compound, a metaloxide, etc.

In example embodiments, insulation layer patterns 325 and 330 may beformed in the peripheral region IV while forming the insulation layer310. That is, the insulation layer 310 and the insulation layer patterns325 and 330 may be concurrently or simultaneously formed. Here, one ofthe insulation layer patterns 325 and 330 may be formed on the portion303 of the outermost wiring 300, and the other of the insulation layerpatterns 325 and 330 may be formed on the metal layer pattern 305. Thus,the portion 303 (e.g., one end portion) of the outermost wiring 300 maybe covered with the insulation layer pattern 325 and another end portionof the outermost wiring 300 may be covered with the insulation layer310. As described above, the insulation layer patterns 325 and 330 maybe easily formed on the outermost wiring 300 and the metal layer pattern305 when the insulation layers 325 and 330 include organic materials,respectively.

Referring now to FIG. 6, the insulation layer 310 may be partiallyetched to form contact holes that expose the first drain electrodes 255of the first transistors 275 in the display region III. Contacts 315 maybe formed in the contact holes, and first electrodes 335 may be formedon the contacts 315 and the insulation layer 310. At this time, theprotection member 340 may be formed on the insulation layer 310 and theoutermost wiring 300 in the peripheral region IV. Namely, the firstelectrodes 335 and the protection member 340 may be concurrently orsimultaneously formed. Each of the first electrodes 335 and theprotection member 340 may be formed utilizing a metal, an alloy, a metalnitride, a conductive metal oxide, a transparent conductive material,etc. Further, the first electrodes 335 and the protection member 340 maybe formed by a sputtering process, a printing process, a chemical vapordeposition process, etc.

The first electrodes 335 may be electrically coupled to (e.g.,electrically connected to) the first drain electrodes 255 through thecontacts 315 formed in the contact holes, respectively. The protectionmember 340 may cover an exposed portion of the outermost wiring 300 andmay extend from the insulation layer 310 to the insulation layer pattern325 in the peripheral region IV. In example embodiments, a portion ofthe protection member 340 formed on the outermost wiring 300 may serveas the first metal layer pattern of the first blocking structure 378(see FIG. 7). The protection member 340 may protect the peripheralcircuits including a gate driver, a data driver, and a timing controllerin addition to the second transistors 280 and the outermost wiring 300from external impacts, static electricity, etc.

Referring to FIG. 7, a pixel defining layer 345 may be formed on thefirst electrodes 335 and the insulation layer 310 in the display regionIII. The pixel defining layer 345 may have openings that expose (e.g,.partially expose) the first electrodes 335. Here, a first insulationlayer pattern 320 and a third insulation layer pattern 350 may be formedon the protection member 340, and a fifth insulation layer pattern 355and a sixth insulation layer pattern 360 may be formed on the insulationlayer pattern 330. The first insulation layer pattern 320 may bepositioned on the protection member 340, and the third insulation layerpattern 350 may be located on the protection member 340 and theinsulation layer pattern 325. The fifth and the sixth insulation layerpatterns 355 and 360 may be disposed on the insulation layer pattern 330in that respective order (i.e., the fifth insulation layer pattern 355may be on the insulation layer patter 330 and the sixth insulation layerpattern 360 may be on the fifth insulation layer pattern 355). Inexample embodiments, the sixth insulation layer pattern 360 may beformed (e.g., obtained) while forming a spacer 348 on the pixel defininglayer 345. For example, the first insulation layer pattern 320, thethird insulation layer pattern 350, the fifth insulation layer pattern355, and the sixth insulation layer pattern 360 may be formed in theperipheral region IV while forming the pixel defining layer 345 and thespacer 348 utilizing a halftone mask or a halftone slit mask in thedisplay region III. As a result, the first blocking structure 378including the first metal layer pattern and the first insulation layerpattern 320 may be formed on the outermost wiring 300. Here, the firstmetal layer pattern of the first blocking structure may be a centralportion of the protection member 340. Thus, the insulation layer pattern325 may be referred to as a second insulation layer pattern, and theinsulation layer pattern 330 may be referred to as a fourth insulationlayer pattern. Hence, a second blocking structure 380 may be provided onthe outermost wiring 300. The second blocking structure 380 may includethe second metal layer pattern 303, the second insulation layer pattern325, and the third insulation layer pattern 350. Additionally, a thirdblocking structure 390 may be formed adjacent to the second blockingstructure 380. The third blocking structure 390 may include the thirdmetal layer pattern 305, the fourth insulation layer pattern 330, thefifth insulation layer pattern 355, and the sixth insulation layerpattern 360.

In example embodiments, each of the pixel defining layer 345, the firstinsulation layer pattern 320, the third insulation layer pattern 350,the fifth insulation layer pattern 355, and the sixth insulation layerpattern 360 may be formed utilizing organic material. For example, eachof the pixel defining layer 345, the first insulation layer pattern 320,the third insulation layer pattern 350, the fifth insulation layerpattern 355, and the sixth insulation layer pattern 360 may be formedutilizing a polyimide-based resin, a photoresist, a polyacryl-basedresin, a polyamide-based resin, a siloxane-based resin, etc. Further,the pixel defining layer 345, the first insulation layer pattern 320,the third insulation layer pattern 350, the fifth insulation layerpattern 355, and the sixth insulation layer pattern 360 may be formed bya printing process, an ink jet process, a spin coating process, etc.

Light emitting layers 365 may be respectively formed on the firstelectrodes 335 exposed by the openings of the pixel defining layer 345.In forming of the light emitting layers 365, an organic light emittinglayer (EML), a hole injection layer (HIL), a hole transfer layer (HTL),an electron transfer layer (ETL), and/or an electron injection layer(EIL) may be formed (e.g., successively formed) on each first electrode335. Here, the organic light emitting layers may be formed utilizinglight emitting materials for generating a red light, a green light,and/or a blue light according to the kinds of pixels in the organiclight emitting display device. Alternatively, each organic lightemitting layer may be obtained by stacking a plurality of light emittingmaterials for generating a red light, a green light, and a blue light oneach first electrode 335 to thereby emit a white light.

In example embodiments, when a mask is place on the pixel defining layer345 and the spacer 348 for forming the light emitting layers 365 in thedisplay region III, the second blocking structure 380 and/or the thirdblocking structure 390 in the peripheral region IV may prevent damage tounderlying structures, including display structures, caused by contactbetween the mask and the underlying structures. Thus, the display devicemay ensure improved reliability and durability.

A second electrode 370 may be formed on the light emitting layers 365,the pixel defining layer 345, and the spacer 348. The second electrode370 may extend along a portion of the protection member 340 thatcontacts the pixel defining layer 345. The second electrode 370 may beformed utilizing a metal, an alloy, a metal nitride, a conductive metaloxide, a transparent conductive material, etc.

As illustrated in FIG. 7, a first organic layer 395 may be formed tocover the display structures in the display region III and the first tothe third blocking structures 378, 380, and 390 in the peripheral regionIV. The first organic layer 395 may be formed utilizing apolyimide-based resin, a polyacryl-based resin, a polyamide-based resin,etc. The first organic layer 395 may be formed by a printing process, anink jet process, a spin coating process, a vacuum evaporation process,etc. In example embodiments, monomers forming an above-discussed resinmay be coated on the display structures and the first to the thirdblocking structures 378, 380, and 390, and then a thermal treatment or aviolet irradiation process may be performed to the monomers, therebyforming (e.g., obtaining) the first organic layer 395. While forming thefirst organic layer 395, the first blocking structure 378 may preventthe leakage or overflow of the first organic layer 395 toward an outsideof the peripheral region IV through the peripheral region IV.

A first inorganic layer 400 may be formed on the first organic layer395. The first inorganic layer 400 may be formed utilizing a metalcompound by a vacuum evaporation process, a sputtering process, achemical vapor deposition process, etc.

Although it is not illustrated, an additional organic layer and anadditional inorganic layer may be alternately formed on the firstinorganic layer 400, so that the display device may have a configurationsubstantially the same as or substantially similar to that of thedisplay device 10 described with reference to FIG. 1. Alternatively,more than one additional organic layer and more than one additionalinorganic layer may be alternately formed on the first inorganic layer400.

FIG. 8 is a cross-sectional view illustrating a plurality of displaydevices in accordance with some other example embodiments of theinvention. For example, FIG. 8 illustrates the plurality of displaydevices provided on a mother substrate before separation of individualdisplay devices. In FIG. 8, like reference numerals are used todesignate elements of the display device the same as those in FIG. 1,and detailed description of these elements may be omitted.

Referring to FIG. 8, the display devices may include at least oneadditional blocking structure 185 disposed between adjacent unit pixelsof the display devices. In this case, each of the unit pixels mayinclude the first blocking structure 98, the second blocking structure100, and the third blocking structure 115 as described above.

In some example embodiments, the display devices may include threeadditional blocking structures 185. The numbers of blocking patterns ineach additional blocking structure 185 may be identical, and thus theadditional blocking structures 185 may have substantially the same orsimilar heights. For example, each of the additional blocking structures185 may have a height substantially the same or substantially similar tothe third height of the third blocking structure 115. Alternatively, theadditional blocking structure 185 may have different or various heights,respectively.

As illustrated in FIG. 8, each of the additional blocking structures 185may include a first additional insulation layer pattern 190, a secondadditional insulation layer pattern 193, a third additional insulationlayer pattern 194, an additional metal layer pattern 195, a fourthadditional insulation layer pattern 198, a fifth additional insulationlayer pattern 200, and a sixth additional insulation layer pattern 203.The first to the third additional insulation layer patterns 190, 193,and 194 may include materials substantially the same as or substantiallysimilar to those of the buffer layer 25, the gate insulation layer 30,and the insulating interlayer 45, respectively. The additional metallayer pattern 195 of each additional blocking structure 185 may includematerial substantially the same as or substantially similar to that ofthe wirings 50 and 55. Further, the fourth additional insulation layerpattern 198, the fifth additional insulation layer pattern 200, and thesixth additional insulation layer pattern 203 may include materialssubstantially the same as or substantially similar to those of theinsulation layer 60, the pixel defining layer 80, and the spacer 83,respectively.

In some example embodiments, the display device may include theadditional blocking structures 185 positioned between adjacent pixels,such that damages to the underlying structures, including the displaystructures, caused by forming the light emitting layers 85 utilizing amask may be more effectively prevented.

The foregoing is illustrative of example embodiments and is not to beconstrued as limiting thereof. Although a few example embodiments havebeen described, those skilled in the art will readily appreciate thatmany modifications are possible in the example embodiments withoutmaterially departing from the novel teachings and aspects of theinvention. Accordingly, all such modifications are intended to beincluded within the scope of the invention as defined in the claims andtheir equivalents. In the claims, means-plus-function clauses areintended to cover the structures described herein as performing therecited function and not only structural equivalents but also equivalentstructures. Therefore, it is to be understood that the foregoing isillustrative of various example embodiments and is not to be construedas limited to the specific example embodiments disclosed, and thatmodifications to the disclosed example embodiments, as well as otherexample embodiments, are intended to be included within the scope of theappended claims and their equivalents.

What is claimed is:
 1. A method of manufacturing a display device, themethod comprising: providing a substrate comprising a display region anda peripheral region; forming a plurality of display structures at thedisplay region of the substrate; forming a plurality of blockingstructures having heights different from each other at the peripheralregion of the substrate; and alternately forming an organic layer and aninorganic layer on the display structures and the blocking structures.2. The method of manufacturing the display device of claim 1, furthercomprising: forming transistors, an insulating interlayer, and wiringson the substrate; forming an insulation layer on the insulatinginterlayer to cover the transistors and the wirings; and forming aprotection member at the peripheral region of the substrate to cover theinsulation layer and an outermost wiring of the wirings.
 3. The methodof manufacturing the display device of claim 2, wherein the forming ofthe plurality of blocking structures comprises: forming a metal layerpattern adjacent to the outermost wiring; forming a first insulationlayer pattern on a portion of the outermost wiring; and forming a secondinsulation layer pattern on the metal layer pattern.
 4. The method ofmanufacturing the display device of claim 3, wherein the outermostwiring and the metal layer pattern are concurrently formed, and whereinthe first and the second insulation layer patterns and the insulationlayer are concurrently formed.
 5. The method of manufacturing thedisplay device of claim 3, wherein the forming of the plurality ofdisplay structures comprises: forming first electrodes on the insulationlayer; forming a pixel defining layer and a spacer on the insulationlayer, the pixel defining layer partially exposing the first electrodes;forming light emitting layers on each of the exposed first electrodes;and forming a second electrode on the light emitting layers, the pixeldefining layer, and the spacer.
 6. The method of manufacturing a displaydevice of claim 5, wherein forming the plurality of blocking structuresfurther comprises: forming a third insulation layer pattern on theprotection member; forming a fourth insulation layer pattern on thefirst insulation layer pattern; forming a fifth insulation layer patternon the second insulation layer pattern; and forming a sixth insulationlayer pattern on the fifth insulation layer pattern.
 7. The method ofmanufacturing a display device of claim 6, wherein the third insulationlayer pattern, the fourth insulation layer pattern, and the fifthinsulation layer pattern are concurrently formed with the pixel defininglayer.
 8. The method of manufacturing a display device of claim 6,wherein the sixth insulation layer pattern and the spacer areconcurrently formed.